基本信息:
- 专利标题: 적어도 하나의 전도성 요소를 형성하는 방법, 반도체 구조물을 형성하는 방법, 메모리 셀 및 관련된 반도체 구조물을 형성하는 방법
- 专利标题(英):Methods of forming at least one conductive element, methods of forming a semiconductor structure, methods of forming a memory cell and related semiconductor structures
- 专利标题(中):形成至少一个导电元件的方法,形成半导体结构的方法,形成存储单元的方法和相关的半导体结构
- 申请号:KR1020137025995 申请日:2012-03-13
- 公开(公告)号:KR101481934B1 公开(公告)日:2015-01-12
- 发明人: 탕,산흐,디. , 실스,스콧이. , 웨스트,휘트니엘. , 굿윈,롭비. , 신하,니샨트
- 申请人: 마이크론 테크놀로지, 인크.
- 申请人地址: **** South Federal Way, Boise, ID, U.S.A.
- 专利权人: 마이크론 테크놀로지, 인크.
- 当前专利权人: 마이크론 테크놀로지, 인크.
- 当前专利权人地址: **** South Federal Way, Boise, ID, U.S.A.
- 代理人: 양영준; 백만기
- 优先权: US13/050,725 2011-03-17
- 国际申请: PCT/US2012/028878 2012-03-13
- 国际公布: WO2012125610 2012-09-20
- 主分类号: H01L21/28
- IPC分类号: H01L21/28 ; H01L21/8242
The present invention relates to a method of forming a conductive element, such as interconnects and the electrodes for the semiconductor structure of the memory cell. The method is a polishing process to charge the at least one opening to at least one of the at least one of the steps of first forming a conductive material and second conductive material and the first and second conductive material containing silver in a portion of the opening a comprises the step of performing. The annealing process may be performed to form an alloy or mixture of silver and materials. The method (e. G., Of less than about 20㎚) allows the silver to form a conductive element having a reduced size. The final conductive element has the desired resistivity. The method may, for example, to form the interconnects for electrically connecting the active devices, and may be used to form the electrode for the memory cell. The semiconductor structure and the memory cell containing such conductive structure is further disclosed.
公开/授权文献:
信息查询:
EspacenetIPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L21/00 | 专门适用于制造或处理半导体或固体器件或其部件的方法或设备 |
--------H01L21/02 | .半导体器件或其部件的制造或处理 |
----------H01L21/027 | ..未在H01L21/18或H01L21/34组中包含的为进一步的光刻工艺在半导体之上制作掩膜 |
------------H01L21/18 | ...器件有由周期表第Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体,如掺杂材料 |
--------------H01L21/28 | ....用H01L21/20至H01L21/268各组不包含的方法或设备在半导体材料上制造电极的 |