基本信息:
- 专利标题： 저온에서 반도체층들을 분리하는 방법
- 专利标题（英）：Method of detaching semi-conductor layers at low temperature
- 专利标题（中）：在低温下分离半导体层的方法
- 申请号：KR1020117031016 申请日：2009-10-29
- 公开(公告)号：KR101446977B1 公开(公告)日：2014-10-07
- 发明人： 랑드뤼디디에 , 라뒤로뉘 , 뱅상세바스티앙
- 申请人： 소이텍
- 申请人地址： Chemin des Franques, Parc Technologique des Fontaines, ***** Bernin, France
- 专利权人： 소이텍
- 当前专利权人： 소이텍
- 当前专利权人地址： Chemin des Franques, Parc Technologique des Fontaines, ***** Bernin, France
- 代理人： 리앤목특허법인
- 优先权： FR08 57411 2008-10-30
- 国际申请： PCT/EP2009/064308 2009-10-29
- 国际公布： WO2010049497 2010-05-06
- 主分类号： H01L21/762
- IPC分类号： H01L21/762 ; H01L27/12
The present invention relates to a method for fabricating the structure of the UTBOX type, the method comprising, a) "donor" to the substrate (1) known as a substrate comprising the steps of assembling the known substrate (2) to the "receiver" substrate, wherein at least one of the two substrates comprises an insulating layer (3) has a thickness of less than 50 ㎚; b) the step of first heat treatment for reinforcing the assembly at a temperature of less than 400 ℃ in order to reinforce the assembly between after the step of during a step of the assembly and / or the assembly, said two substrates; And c) a step of second heat treatment at a temperature of greater than 900 ℃, the exposure time between 400 ℃ to 900 ℃ is a step of less than 1 minute, or 30 seconds.
公开/授权文献:
- KR1020120013454A 저온에서 반도체층들을 분리하는 방법 公开/授权日：2012-02-14
信息查询:
EspacenetIPC结构图谱:
| H | 电学 |
| --H01 | 基本电气元件 |
| ----H01L | 半导体器件；其他类目未包含的电固体器件 |
| ------H01L21/00 | 专门适用于制造或处理半导体或固体器件或其部件的方法或设备 |
| --------H01L21/67 | .专门适用于在制造或处理过程中处理半导体或电固体器件的装置；专门适合于在半导体或电固体器件或部件的制造或处理过程中处理晶片的装置 |
| ----------H01L21/71 | ..限定在组H01L21/70中的器件的特殊部件的制造 |
| ------------H01L21/76 | ...组件间隔离区的制作 |
| --------------H01L21/762 | ....介电区 |