基本信息:
- 专利标题： 스위치 ＡＳＩＣ 내에 라인-레이트 애플리케이션 인식을 통합하기 위한 시스템 및 방법
- 专利标题（英）：System and method for integrating line-rate application recognition in a switch asic
- 专利标题（中）：用于在开关ASIC中集成线速应用识别的系统和方法
- 申请号：KR1020120108645 申请日：2012-09-28
- 公开(公告)号：KR101409921B1 公开(公告)日：2014-06-19
- 发明人： 타르도,조셉 , 후아,덕 , 힐,네이트 , 윌스키,스타니슬라스
- 申请人： 브로드콤 코포레이션
- 申请人地址： **** California Avenue, Irvine CA ***** U.S.A.
- 专利权人： 브로드콤 코포레이션
- 当前专利权人： 브로드콤 코포레이션
- 当前专利权人地址： **** California Avenue, Irvine CA ***** U.S.A.
- 代理人： 특허법인에이아이피
- 优先权： US13/331,542 2011-12-20; US61/565,423 2011-11-30
- 主分类号： H04L12/26
- IPC分类号： H04L12/26 ; H04L12/70
The system and method in line switch ASIC - incorporates the recognition rate applications. Switching platform may be more expensive, rather than a special processor to be built using this characteristic to conventional control plane processor. Deep packet inspection system may be embodied in a switch using an ASIC flow tracker and signature matching engine. Flow tracker may be disposed on the ingress portion of the ASIC in the switch position which packets may be observed and recorded in the two-way flow. Flow tracker generates the signature matches the signature request is sent to the matching engine from the auxiliary pipeline. Signature matching engine will report the signature matching result in the flow tracker using a response packet to be sent to the ingress pipeline and analyzing the packet by using the signature matching state machine.
公开/授权文献:
- KR1020130085919A 스위치 ＡＳＩＣ 내에 라인-레이트 애플리케이션 인식을 통합하기 위한 시스템 및 방법 公开/授权日：2013-07-30