基本信息:
- 专利标题: 반도체패키지
- 专利标题(英):semiconductor package
- 专利标题(中):空值
- 申请号:KR1019990044653 申请日:1999-10-15
- 公开(公告)号:KR100403142B1 公开(公告)日:2003-10-30
- 发明人: 장성식
- 申请人: 앰코 테크놀로지 코리아 주식회사
- 申请人地址: 광주광역시 북구 앰코로 *** (대촌동)
- 专利权人: 앰코 테크놀로지 코리아 주식회사
- 当前专利权人: 앰코 테크놀로지 코리아 주식회사
- 当前专利权人地址: 광주광역시 북구 앰코로 *** (대촌동)
- 代理人: 서만규
- 主分类号: H01L23/04
- IPC分类号: H01L23/04
This invention relates to a semiconductor package, MLF (Micro LeadFrame) type further enhances the adhesive strength between the mounting board and the package body chip in the semiconductor package and also the semiconductor a large number of input-output pad (2a) formed so as to easily perform a ground bonding chip (2) and; Above are bonded with an adhesive on the lower surface of the semiconductor chip 2, the lower side, the chip is a half etching portion (4a) formed in the plate (4) and; The chip mounting board (4) a plurality of inner leads 6 is spaced apart a predetermined distance to the outer periphery formed with; The conductive wire 8 for electrically connecting the input and output pads (2a) and the inner leads 6 of the semiconductor chip (2) and; A bottom surface and a side surface of the semiconductor chip (2), the conductive wire 8, the chip mounting plate 4 and the inner lead (6) a bag or the like to the sealing material, the chip mounting plate 4 and the inner lead 6 is that in a semiconductor package 100 comprising a package body 22 is formed by sealing so as to be exposed to the outside, it said chip mounting board (4) is formed further a plurality of elongated holes (4b) on a half etching of the side portions (4a) the semiconductor package according to claim.
公开/授权文献:
- KR1020010037249A 반도체패키지 公开/授权日:2001-05-07