基本信息:
- 专利标题: 폴리실리콘 전극을 가지는 반도체 소자의 제조 방법
- 专利标题(英):Manufacturing method of a semiconductor device having a polysilicon electrode
- 专利标题(中):폴리실리콘전극을가지는반도체소자의제조방폴
- 申请号:KR1020010056518 申请日:2001-09-13
- 公开(公告)号:KR100400860B1 公开(公告)日:2003-10-08
- 发明人: 김종환 , 김철중 , 이석균
- 申请人: 페어차일드코리아반도체 주식회사
- 申请人地址: 경기도 부천시 원미구 평천로***번길 ** (도당동)
- 专利权人: 페어차일드코리아반도체 주식회사
- 当前专利权人: 페어차일드코리아반도체 주식회사
- 当前专利权人地址: 경기도 부천시 원미구 평천로***번길 ** (도당동)
- 代理人: 유미특허법인
- 主分类号: H01L29/70
- IPC分类号: H01L29/70
摘要:
A semiconductor device and a method of manufacturing the semiconductor device having a vertical NPN bipolar transistor, a lateral PNP bipolar transistor, and P-type and N-type resistors are disclosed. In one embodiment, a photoresist pattern is formed on a pad oxide layer and field oxides on an N-type epitaxial layer that is grown on a P-type semiconductor substrate. The pad oxide layer is etched after implanting P-type impurity into the epitaxial layer by using the photoresist pattern as a mask. Deposition of a polysilicon layer after removing the photoresist pattern is followed by implanting P-type impurity and N-type impurity into the polysilicon layer in sequence. Another photoresist pattern formed on the polysilicon layer after the previous implantation is used as an etch mask for etching the polysilicon layer to form polysilicon electrodes of transistors and P-type and N-type resistors as well as expose the surface of the epitaxial layer near an emitter region of the vertical transistor. P-type impurity is implanted into the epitaxial layer through the exposed surface thereof by using the photoresist pattern as an implant mask. The structure is then subjected to heat treatment to form emitter, intrinsic and extrinsic base, and collector regions of the transistors.
摘要(中):
公开了一种半导体器件和制造具有垂直NPN双极型晶体管,横向PNP双极晶体管以及P型和N型电阻器的半导体器件的方法。 在一个实施例中,在P型半导体衬底上生长的N型外延层上的衬垫氧化物层和场氧化物上形成光致抗蚀剂图案。 通过使用光致抗蚀剂图案作为掩模将P型杂质注入到外延层中之后对垫氧化物层进行蚀刻。 在去除光致抗蚀剂图案之后沉积多晶硅层之后,依次向多晶硅层中注入P型杂质和N型杂质。 在先前注入之后在多晶硅层上形成的另一光致抗蚀剂图案被用作蚀刻掩模,用于蚀刻多晶硅层以形成晶体管和P型和N型电阻器的多晶硅电极以及暴露外延层的表面 垂直晶体管的发射极区域。 通过使用光致抗蚀剂图案作为注入掩模,通过P型杂质的暴露表面将P型杂质注入到外延层中。 然后对该结构进行热处理以形成晶体管的发射极,本征和外部基极以及集电极区。
公开/授权文献:
- KR1020030023356A 폴리실리콘 전극을 가지는 반도체 소자의 제조 방법 公开/授权日:2003-03-19