基本信息:
- 专利标题: I / O interface circuit, integrated circuit devices and electronic equipment
- 申请号:JP2009156539 申请日:2009-07-01
- 公开(公告)号:JP5359614B2 公开(公告)日:2013-12-04
- 发明人: 智子 原 , 良彦 二村
- 申请人: セイコーエプソン株式会社
- 专利权人: セイコーエプソン株式会社
- 当前专利权人: セイコーエプソン株式会社
- 优先权: JP2009156539 2009-07-01
- 主分类号: H03K19/0175
- IPC分类号: H03K19/0175 ; H01L21/822 ; H01L21/8238 ; H01L27/04 ; H01L27/06 ; H01L27/092 ; H03K19/003
摘要:
An input-output interface circuit of the present invention includes an input-output terminal, an input buffer, a first MOS transistor of a first conductivity type formed in a floating well region, an output buffer for outputting a signal externally through the input-output terminal, an electrostatic protection circuit, and a floating well potential adjusting circuit, wherein the electrostatic protection circuit has a first resistance, and a diode connected between another end of the first resistance and a high level power supply potential, and the floating well potential adjusting circuit has a second resistance having one end connected to the input-output terminal, and a second MOS transistor of the first conductivity type having one end connected to another end of the second resistance, another end connected to the floating well region, and a gate connected to the high level power supply potential.
公开/授权文献:
信息查询:
EspacenetIPC结构图谱:
H | 电学 |
--H03 | 基本电子电路 |
----H03K | 脉冲技术 |
------H03K19/00 | 逻辑电路,即,至少有两个输入作用于一个输出的;倒向电路 |
--------H03K19/0175 | .耦合装置;接口装置 |