发明专利
JP5299901B2 And wiring method of forming a semiconductor integrated circuit device, wiring structure
有权
基本信息:
- 专利标题： And wiring method of forming a semiconductor integrated circuit device, wiring structure
- 申请号：JP2008533223 申请日：2007-09-06
- 公开(公告)号：JP5299901B2 公开(公告)日：2013-09-25
- 发明人： 雄信 吉野 , 信宏 秦 , 潤 川原
- 申请人： 独立行政法人産業技術総合研究所 , 日本電気株式会社
- 专利权人： 独立行政法人産業技術総合研究所,日本電気株式会社
- 当前专利权人： 独立行政法人産業技術総合研究所,日本電気株式会社
- 优先权： JP2006244192 2006-09-08
- 主分类号： H01L21/768
- IPC分类号： H01L21/768 ; H01L21/312 ; H01L23/522
摘要：
Provided is a semiconductor integrated circuit device, in which a 3IP(isopropyl-radical)-3V(vinyl-radical)-cyclohexane (OCS) film (20) to appear simultaneously with a copper wiring layer (7) is used, as a film to be formed between copper wires, when the wiring layer is formed. The semiconductor integrated circuit device is characterized by using a barrier property of the OCS film against a copper ion drift. The wire is formed by forming a conductive layer containing copper over an insulating film (4), by patterning the conductive layer to form wires, by forming the OCS film at least between the wires, and by laminating another insulating film on the surface. Alternatively, the wire is formed by forming wiring pattern grooves in an insulating layer having the OCS film on the surface, by forming a conductive layer containing copper, by burying by the Damascene or etch-back method using the OCS film for a terminal detection, and by forming another insulating film on the surface.
公开/授权文献:
- JPWO2008029956A1 半導体集積回路装置と配線形成方法 公开/授权日：2010-01-21
信息查询:
EspacenetIPC结构图谱:
| H | 电学 |
| --H01 | 基本电气元件 |
| ----H01L | 半导体器件；其他类目未包含的电固体器件 |
| ------H01L21/00 | 专门适用于制造或处理半导体或固体器件或其部件的方法或设备 |
| --------H01L21/67 | .专门适用于在制造或处理过程中处理半导体或电固体器件的装置；专门适合于在半导体或电固体器件或部件的制造或处理过程中处理晶片的装置 |
| ----------H01L21/71 | ..限定在组H01L21/70中的器件的特殊部件的制造 |
| ------------H01L21/768 | ...利用互连在器件中的分离元件间传输电流 |