PROBLEM TO BE SOLVED: To provide a programmable logic device and a method of verification thereof which implement efficient verification as to whether internal states indicated by sequential circuits transition equivalently to a logic program in a hardware description language (HDL).SOLUTION: A programmable logic device 10 includes: an I/O section 17 for executing input/output of digital signals to implemented logic elements and the outside; generation sections 12 (12a, 12b, 12c, 12d) for acquiring internal state signals of the sequential circuits included in subregions 11 (11a, 11b, 11c, 11d) divided from the group of logic elements, and generating state information 13 (13a, 13b, 13c, 13d) in the units of the subregions 11; and a selective output section 14 for acquiring and selectively outputting to the outside the state information 13 from each subregion 11.