PROBLEM TO BE SOLVED: To provide a NAND type multi-state memory cell capable of achieving high memory density, low power consumption, and high reliability. SOLUTION: A NAND type multi-state memory cell has two drain/source regions on a substrate. At the upper part of the substrate between the two drain/source regions, an oxide-nitride-oxide structure is formed. The nitride layer acts as an asymmetric charge trapping layer. At the upper part of the oxide-nitride-oxide structure, a control gate is disposed. By applying an asymmetrical bias across the drain/source region, a high voltage is generated therein. Thereby, GIDL (Gate Induced Drain Leakage) hole injection processing is performed for the trapping layer substantially adjacent the drain/source region and holes are injected in an asymmetrical distribution. COPYRIGHT: (C)2011,JPO&INPIT