基本信息:
- 专利标题: 4TH QUADRANT MULTIPLICATION CIRCUIT
- 申请号:JP22973898 申请日:1998-08-14
- 公开(公告)号:JP2000057242A 公开(公告)日:2000-02-25
- 发明人: TAKEUCHI TAKANOBU
- 申请人: MITSUBISHI ELECTRIC CORP
- 专利权人: MITSUBISHI ELECTRIC CORP
- 当前专利权人: MITSUBISHI ELECTRIC CORP
- 优先权: JP22973898 1998-08-14
- 主分类号: G06G7/163
- IPC分类号: G06G7/163
摘要:
PROBLEM TO BE SOLVED: To permit driving by low voltage by making a 1st voltage compression circuit constructed with P channel MOSFET and making a 2nd voltage compression circuit constructed with an N channel MOSFET. SOLUTION: A P channel voltage compression circuit 101 steps down input voltage Vin (a) and reference voltage Vref 1 in a prescribed ratio and outputs them. An N channel voltage compression circuit 102 steps down input voltage Vin (b) and the reference voltage Vref 1 in a prescribed ratio. It is possible to apply voltage that is higher than the voltage Vref 1 to the gate voltage of PMOSs 40 to 43 of a current conversion circuit 106 and to apply voltage that is lower than the voltage Vref 1 to the gate voltage of PMOSs 20 to 23 of 1st and 2nd voltage conversion circuits 103 and 104. Thus, it is possible to operate the PMOSs 20 to 23 in a pentode area even if power supply voltage Vcc is low.
公开/授权文献:
- JP3880730B2 4 quadrant multiplying circuit 公开/授权日:2007-02-14
信息查询:
EspacenetIPC结构图谱:
G | 物理 |
--G06 | 计算;推算;计数 |
----G06G | 模拟计算机 |
------G06G7/00 | 通过改变电量或磁量执行计算操作的器件 |
--------G06G7/12 | .用于执行计算操作的装置,例如,为执行计算操作专用的放大器 |
----------G06G7/16 | ..用于乘法或除法的 |
------------G06G7/163 | ...应用由一个输入信号、可变增益或传递函数控制的可变阻抗的 |