基本信息:
- 专利标题： APPARATUS AND METHOD FOR MEMORY MANAGEMENT IN A GRAPHICS PROCESSING ENVIRONMENT
- 申请号：EP19202984.1 申请日：2018-03-29
- 公开(公告)号：EP3614270A1 公开(公告)日：2020-02-26
- 发明人： COORAY, Niranjan L. , APPU, Abhishek R. , KOKER, Altug , RAY, Joydeep , VEMBU, Balaji , K, Pattabhiraman , PUFFER, David , COWPERTHWAITE, David J. , SANKARAN, Rajesh M. , SINGH, Satyeshwar , KP, Sameer , SHAH, Ankur N. , TIAN, Kun
- 申请人： Intel Corporation
- 申请人地址： 2200 Mission College Boulevard Santa Clara, CA 95054 US
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： 2200 Mission College Boulevard Santa Clara, CA 95054 US
- 代理机构： Goddar, Heinz J.
- 优先权： US201715482690 20170407
- 主分类号： G06F12/1027
- IPC分类号： G06F12/1027 ; G06F12/1036 ; G06F12/1009 ; G06F13/16 ; G06F13/40
摘要：
An apparatus and method are described for implementing memory management in a graphics processing system. For example, one embodiment of an apparatus comprises: a first plurality of graphics processing resources to execute graphics commands and process graphics data; a first memory management unit (MMU) to communicatively couple the first plurality of graphics processing resources to a system-level MMU to access a system memory; a second plurality of graphics processing resources to execute graphics commands and process graphics data; a second MMU to communicatively couple the second plurality of graphics processing resources to the first MMU; wherein the first MMU is configured as a master MMU having a direct connection to the system-level MMU and the second MMU comprises a slave MMU configured to send memory transactions to the first MMU, the first MMU either servicing a memory transaction or sending the memory transaction to the system-level MMU on behalf of the second MMU.
公开/授权文献:
IPC结构图谱:
| G | 物理 |
| --G06 | 计算；推算；计数 |
| ----G06F | 电数字数据处理 |
| ------G06F12/00 | 在存储器系统或体系结构内的存取、寻址或分配 |
| --------G06F12/02 | .寻址或地址分配；地址的重新分配 |
| ----------G06F12/08 | ..在分级结构的存储系统中的寻址、地址分配、或地址的重新分配，例如，虚拟存储系统 |
| ------------G06F12/0802 | ...存储器层的寻址，其中需要关联寻址方法来访问期望数据或数据块，例如：高速缓存 |
| --------------G06F12/1027 | ....使用联合或伪联合地址转换装置，例如：翻译后援缓冲器（TLB） |