![SUBSTRATE-LESS STACKABLE PACKAGE WITH WIRE-BOND INTERCONNECT](/ep/2015/04/01/EP2852974A1/abs.jpg.150x150.jpg)
基本信息:
- 专利标题: SUBSTRATE-LESS STACKABLE PACKAGE WITH WIRE-BOND INTERCONNECT
- 专利标题(中):STAPELBARE SUBSTRATLOSE VERPACKUNG MIT DRAHTBONDVERBINDUNG
- 申请号:EP13724714.4 申请日:2013-05-21
- 公开(公告)号:EP2852974A1 公开(公告)日:2015-04-01
- 发明人: MOHAMMED, Ilyas
- 申请人: Invensas Corporation
- 申请人地址: 3025 Orchard Parkway San Jose CA 95134 US
- 专利权人: Invensas Corporation
- 当前专利权人: Invensas Corporation
- 当前专利权人地址: 3025 Orchard Parkway San Jose CA 95134 US
- 代理机构: Ahmad, Sheikh Shakeel
- 优先权: US201213477532 20120522
- 国际公布: WO2013177134 20131128
- 主分类号: H01L23/00
- IPC分类号: H01L23/00 ; H01L23/538 ; H01L25/10 ; H01L21/48 ; H01L23/495
摘要:
A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are uncovered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.
摘要(中):
制造微电子单元的方法包括在包括可图案化的金属元件的结构的导电接合表面的形式的第一表面上形成多个引线接合。 线接合形成有连接到第一表面和远离第一表面的端表面的基底。 线接合具有在基部和端面之间延伸的边缘表面。 该方法还包括在导电层的第一表面的一部分上方并且在引线接合部分之上形成电介质封装层,使得引线接合的未封装部分由端面或边缘表面的未被 封装层。 金属元件被图案化以在引线键合下形成第一导电元件,并且通过封装层的一部分彼此绝缘。
公开/授权文献:
IPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L23/00 | 半导体或其他固态器件的零部件 |