发明公开
EP2631255A4 FILLER COMPOSITION FOR SPACE BETWEEN LAYERS OF THREE-DIMENSIONAL INTEGRATED CIRCUIT, COATING FLUID, AND PROCESS FOR PRODUCING THREE-DIMENSIONAL INTEGRATED CIRCUIT
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基本信息:
- 专利标题： FILLER COMPOSITION FOR SPACE BETWEEN LAYERS OF THREE-DIMENSIONAL INTEGRATED CIRCUIT, COATING FLUID, AND PROCESS FOR PRODUCING THREE-DIMENSIONAL INTEGRATED CIRCUIT
- 专利标题（中）：FÜLLSTOFFZUSAMMENSETZUNGFÜRDEN RAUM ZWISCHEN DEN SCHICHTEN EINES DREIDIMENSIONALEN INTEGRIERTEN SCHALTKREISES，BESCHICHTUNGSFLUID UND VERFAHREN ZU HERSTELLUNG DES DREIDIMENSIONALEN INTEGRIERTEN SCHALTKREISES
- 申请号：EP11834363 申请日：2011-10-18
- 公开(公告)号：EP2631255A4 公开(公告)日：2017-07-05
- 发明人： IKEMOTO MAKOTO , KAWASE YASUHIRO , MURASE TOMOHIDE , TAKAHASHI MAKOTO , HIRAI TAKAYOSHI , KAMIMURA IHO
- 申请人： MITSUBISHI CHEM CORP
- 专利权人： MITSUBISHI CHEM CORP
- 当前专利权人： MITSUBISHI CHEMICAL CORPORATION
- 当前专利权人地址： MITSUBISHI CHEMICAL CORPORATION
- 优先权： JP2010274544 2010-12-09; JP2010268413 2010-12-01; JP2010268412 2010-12-01; JP2010233799 2010-10-18
- 主分类号： C08G59/14
- IPC分类号： C08G59/14 ; C08G59/20
摘要：
To provide an interlayer filler composition which, in 3D lamination of semiconductor device chips, forms a highly thermally conductive filling interlayer simultaneously with the bonding of solder bumps or the like and lands between semiconductor device chips, a coating fluid and a process for producing a three-dimensional integrated circuit. An interlayer filler composition for a three-dimensional integrated circuit, which comprises a resin (A) having a melt viscosity at 120°C of at most 100 Pa·s and a flux (B), the content of the flux (B) being at least 0.1 part by weight and at most 10 parts by weight per 100 parts by weight of the resin (A), or comprises a resin (A) having a melt viscosity at 120°C of at most 100 Pa·s and a coefficient of thermal conductivity of at least 0.2 W/mK, an inorganic filler (C) having a coefficient of thermal conductivity of at least 2 W/mK, a volume average particle size of at least 0.1 µm and at most 5 µm and a maximum volume particle size of at most 10 µm, and a curing agent (D) and/or a flux (B).
摘要（中）：
本发明提供一种层间填充剂组合物，其在半导体器件芯片的3D层叠中，与半导体器件芯片之间的焊料凸块等的接合以及焊盘的接合同时形成高导热填充中间层，涂布液和制造三 三维集成电路。 一种用于三维集成电路的层间填料组合物，其包含在120℃下的熔体粘度为至多100Pa·s的树脂（A）和助熔剂（B），所述助熔剂（B）的含量为 （A）100重量份中为0.1重量份以上且10重量份以下，或者包含120℃下的熔融粘度为100Pa·s以下的树脂（A） 至少0.2W / mK的导热系数，至少2W / mK的导热系数的无机填料（C），至少0.1μm并且至多5μm的体积平均粒径和最大体积 至多10μm的粒径，和固化剂（D）和/或助熔剂（B）。