发明公开
EP2572375A2 ELECTRICAL CONNECTOR BETWEEN DIE PAD AND Z-INTERCONNECT FOR STACKED DIE ASSEMBLIES
审中-公开
![ELECTRICAL CONNECTOR BETWEEN DIE PAD AND Z-INTERCONNECT FOR STACKED DIE ASSEMBLIES](/ep/2013/03/27/EP2572375A2/abs.jpg.150x150.jpg)
基本信息:
- 专利标题: ELECTRICAL CONNECTOR BETWEEN DIE PAD AND Z-INTERCONNECT FOR STACKED DIE ASSEMBLIES
- 专利标题(中):之间的芯片焊盘和Z联网堆栈芯片装置的电连接器
- 申请号:EP11784147.8 申请日:2011-05-18
- 公开(公告)号:EP2572375A2 公开(公告)日:2013-03-27
- 发明人: CO, Reynaldo , LEAL, Jeffrey, S. , PANGRLE, Suzette, K. , MCGRATH, Scott , MELCHER, DeAnn, Eileen , BARRIE, Keith, L. , VILLAVICENCIO, Grant , DEL ROSARIO, Elmer, M. , BRAY, John, R.
- 申请人: Invensas Corporation
- 申请人地址: 2702 Orchard Parkway San Jose, CA 95134 US
- 专利权人: Invensas Corporation
- 当前专利权人: Invensas Corporation
- 当前专利权人地址: 2702 Orchard Parkway San Jose, CA 95134 US
- 代理机构: Ahmad, Sheikh Shakeel
- 优先权: US395987P 20100519
- 国际公布: WO2011146579 20111124
- 主分类号: H01L23/12
- IPC分类号: H01L23/12 ; H01L23/48
摘要:
Methods for forming connectors on die pads at a wafer level of processing include forming spots of a curable electrically conductive material over die pads and extending to or over the interconnect die edge; curing the conductive material; and in a wafer cutting procedure thereafter severing the spots. Also, die pad to z-interconnect connectors formed by the methods, and shaped and dimensioned accordingly. Also, stacked die assemblies and stacked die packages containing die prepared according to the methods and having die pad to z-interconnect connectors formed by the methods and shaped and dimensioned accordingly.
IPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L23/00 | 半导体或其他固态器件的零部件 |
--------H01L23/12 | .安装架,例如不可拆卸的绝缘衬底 |