An electronic device for securing the contents of data storage and processing elements. The device includes a security element and a phase-change element connected in a parallel arrangement. The security element is a three-terminal device, such as a conventional transistor or three-terminal phase-change device, having an ON state and an OFF state which differ with respect to resistance and regulate electronic access to the phase-change element by controlling the flow of electrical current applied to the parallel combination. In the ON state, the resistance of the security element is less than that of the phase-change element, thereby preventing, inhibiting or confusion a determination of the resistance of the phase-change element. In this PROTECT mode, the contents of the phase-change element are secured. In the OFF state, the resistance of the security element is greater than that of the phase-change material so that the resistance of the parallel combination approaches that of the phase-change element. In this READ mode, the resistance and information content of the phase-change element can be determined. The phase-change element includes a phase-change material and is preferably a chalcogenide based element. The phase-change element may perform a storage or processing function and includes registers and weighting devices as preferred embodiments.