发明公开
EP0922944A3 Method for manufacturing integrated structures including removing a sacrificial region
失效
基本信息:
- 专利标题： Method for manufacturing integrated structures including removing a sacrificial region
- 专利标题（中）：一种用于通过去除牺牲辅助层制备integrieten电路结构处理
- 申请号：EP98830266.7 申请日：1998-04-30
- 公开(公告)号：EP0922944A3 公开(公告)日：1999-11-10
- 发明人： Montanini, Pietro , Ferrera, Marco , Castoldi, Laura , Gelmi, Ilaria
- 申请人： STMicroelectronics S.r.l.
- 申请人地址： Via C. Olivetti, 2 20041 Agrate Brianza (Milano) IT
- 专利权人： STMicroelectronics S.r.l.
- 当前专利权人： STMicroelectronics S.r.l.
- 当前专利权人地址： Via C. Olivetti, 2 20041 Agrate Brianza (Milano) IT
- 代理机构： Cerbaro, Elena
- 优先权： EP97830345 19970710; EP97830407 19970731; EP97830406 19970731; EP97830537 19971023
- 主分类号： G01L9/00
- IPC分类号： G01L9/00
摘要：
The method is based on the use of a silicon carbide mask for removing a sacrificial region. In case of manufacture of integrated semiconductor material structures, the following steps are performed: forming a sacrificial region (6) of silicon oxide on a substrate (1) of semiconductor material; growing a pseudo-epitaxial layer (8); forming an electronic circuit (10-13, 18); depositing a silicon carbide layer (21); defining photolithographycally the silicon carbon layer so as to form an etching mask (23) containing the topography of a microstructure (27) to be formed; with the etching mask (23), forming trenches (25) in the pseudo-epitaxial layer (8) as far as the sacrificial region (6) so as to laterally define the microstructure; and removing the sacrificial region (6) through the trenches (25).