A modulator/demodulator apparatus has a first digital signal processor (DSP1) that is operable in a full duplex mode for providing digital samples to a coder-decoder (IOP) and receiving transmitted samples therefrom. The first digital signal processor (DSP1) is responsive to received samples for initiating echo cancellation in the received samples. A second digital signal processor (DSP2) is operable to demodulate samples received from the first digital signal processor and output demodulated information therefrom. An input/output processor (IOP) initiates operation of the first and second digital signal processor. The input/output processor receives input information to be transmitted and supplies that information to the first digital signal processor and receives demodulated message information from the second digital signal processor and outputs message information to one or more user devices. The input/output processor also receives transmitter digital samples which are to be demodulated from the first digital signal processor and supplies the transmitted samples to be demodulated to the second digital signal processor. The input/output processor as operable in a full duplex mode.
Accordingly the input/output processor acts as a system controller in controlling transmission and reception digital signal processors which provide independent transmission and reception functions suitable for a multirate modem apparatus.