1,130,055. Shift registers. NORTH AMERICAN AVIATION Inc. 25 July, 1966 [28 Jan., 1966], No. 33383/66. Heading G4C. [Also in Divisions H1 and H3] A switching circuit suitable for use in a logic circuit or shift register comprises a capacitor, means for charging it during first recurrent intervals of time and means for discharging it or not depending upon the state of an information input during second recurrent intervals whereby the state of the capacitor represents the information input. In Fig. 2 a clock pulse of phase # 1 is applied to the gate of charging and isolating transistors 21-28 to charge to a voltage -V the output capacitance and the capacitance of the transistors in logic circuit 30. A subsequent clock pulse of phase # 2 renders transistor 28 again conductive so that capacitor 20 is discharged or left charged depending on the state of the logic circuit 30. The - V supply may be a - 20 V. pulse of phase # 1 and the connection to earth may be replaced by a pulse source having a zero value in phase period # 2 . In Fig. 1, 28 and 29 are replaced by a series parallel field effect transistor logic circuit (10) connected to earth through an isolating transistor (14) receiving # 2 pulses at its gate, and the upper transistor (8) of the logic circuit may be a further isolating transistor receiving 91 and # 2 pulses at its gate. In Figs. 3 and 4 (not shown) the isolating transistor 28 is replaced by one or by two in parallel controlled by # 1 and # 2 pulses and connected in series with the output lead (transistors 35 or 44 and 45). In Fig. 5 (not shown) transistor 28 is replaced by parallel transistors receiving respectively the two phases of clock pulse. A shift register may be formed from cascaded stages, adjacent-stages receiving pulses of # 1 , # 2 and # 3 , # 4 respectively in the order # 1 , # 2 , # 3 , # 4 and an integrated form of such a register using stages similar to .Fig. 2 is described (Fig. 5, not shown).