The high-capacitivity storage charge capacitor in DRAM possesses lower electrode, contacted with source/drain region of transfer FET. The lower electrode includes first polycrystalline silicon layer covering over part of transfer FET, and on the first polycrystalline silicon layer an oxide layer is formed, and on the oxide layer a hemisphere granular polycrystalline silicon layer is formed, its grain is about 100nm, and the distance between hemispheres is about 100 nm. the etched oxide layer is formed into cylindrical oxide layer, the hemisphere granular polycrystalline silicon is used as etched mask, and the first polycrystalline silicon layer is etched end layer. On the surface of cylindrical oxide layer and hemisphere granular polycrystalline silicon layer the second polycrystalline silicon layer is sedimentated, and on the second polycrystalline silicon layer the capacitive dielectric layer and capacitive upper electrode are formed in turn.