The invention provides a serializer/deserializer and a high-speed interface protocol exchange chip. The serialization/deserialization device comprises a configuration management circuit and a set number of serialization/deserialization circuits. The serialization/deserialization circuit comprises a receiver, a transmitter and a clock management circuit; the configuration management circuit receives a configuration instruction sent by the software definition control circuit; each serialization/deserialization circuit is set according to the configuration instruction; the clock management circuit outputs a clock signal corresponding to the configuration instruction to the receiver and the transmitter; the receiver converts serial data sent by an external physical link into parallel data according to a high-speed interface protocol corresponding to the configuration instruction, and then sends the parallel data to the physical coding circuit; and the sender converts the parallel data sent by the physical coding circuit into serial data according to a high-speed interface protocol corresponding to the configuration instruction, and then sends the serial data to an external physical link. According to the invention, the applicability of the serializer/deserializer to various high-speed interface protocols is improved, and the efficiency is improved.