The present invention provides a buffer circuit and a buffer. The buffer circuit comprises: an input following circuit configured to follow voltage change with first input signals; an input followinglinearity lifting circuit configured to lift the following linearity of the input following circuit; a first voltage bootstrap circuit configured to perform bootstrap of the voltage of the first inputsignals; a second voltage bootstrap circuit configured to perform bootstrap of the voltage of the second input signals; a third voltage bootstrap circuit configured to provide a corresponding quiescent operating point voltage; a compensation following circuit configured to follow a compensation voltage; a compensation following linearity lifting circuit configured to lift the following linearityof the compensation following circuit; a first load configured to collect voltage after buffer; and a bias circuit configured to provide a bias current for the buffer; a bias linearity lifting circuitconfigured to lift the linearity of the bias circuit; and a second load configured to generate a non-linear compensation current. The buffer circuit and the buffer employ the buffer circuit to improve the linearity of the input buffer and reduce the power consumption.