The invention provides a manufacturing method for a three-dimensional NAND flash memory device. The three-dimensional NAND flash memory device is manufactured based on a semiconductor substrate provided with a front-processed CMOS device. At the same time, an inducing metal layer and a noncrystalline silicon layer are formed on the side wall of a perpendicular channel in a laminated structure andan annealing technique is utilized for exchanging positions of the inducing metal layer and the noncrystalline silicon layer and converting the noncrystalline silicon layer into a polycrystalline silicon layer. After the inducing metal layer on the surface of the polycrystalline silicon layer is removed, the polycrystalline silicon perpendicular channel is acquired. Then the polycrystalline silicon perpendicular channel is filled with a polycrystalline silicon medium layer and the top part of the polycrystalline silicon medium layer is further covered with polycrystalline silicon, so that a conducting through hole structure and a metal mutual connection structure can be made. The preparation temperatures of the above steps are all not higher than 500 DEG C, so that compatibility of front-processing and rear-processing in integrated circuit manufacture is realized.