The invention discloses an IED double-channel data transmission and double-logic verification system and method based on an FPGA, and the system comprises a PL module, a PS module, and an MIO. The PL comprises two independent AXI interconnection channels: a main AXI interconnection channel and a standby AXI interconnection channel. The PS comprises a double-core CPU: a main CPU core and a standby CPU core. The MIO comprises two independent external network ports: a main external network port and a standby external port. The main AXI interconnection channel is connected with the main CPU core, and then is connected with the main external network port, thereby forming a main channel. The standby AXI interconnection channel is connected with the standby CPU core, and then is connected with the standby external network port, thereby forming a standby channel. The system and method improve the real-time data interaction capability under the condition that the conventional intelligent transformer station design and maintenance mode are not changed. When a fault of the main channel arouses a data logic verification error of the main channel, standby data is switched to the path of the main channel through the internal interconnection and is retransmitted, thereby improving the fault-tolerant capability of the IED to an internal chip or device.