![数据存储及处理电路](/CN/2015/1/201/images/201511007611.jpg)
基本信息:
- 专利标题: 数据存储及处理电路
- 申请号:CN201511007611.X 申请日:2015-12-29
- 公开(公告)号:CN105405465B 公开(公告)日:2019-07-23
- 发明人: 尤文斌 , 丁永红 , 马铁华 , 裴东兴 , 范锦彪 , 李新娥 , 张瑜 , 王燕 , 张晋业 , 刘明军
- 申请人: 中北大学
- 申请人地址: 山西省太原市尖草坪区学院路3号
- 专利权人: 中北大学
- 当前专利权人: 中北大学
- 当前专利权人地址: 山西省太原市尖草坪区学院路3号
- 代理机构: 太原市科瑞达专利代理有限公司
- 代理人: 李富元
- 主分类号: G11C16/22
- IPC分类号: G11C16/22
The invention relates to a data storing and processing circuit, and belongs to the technical field of storage testing under bad conditions. Loss of programming, writing-in and storing uncompleted data in the buffer RAM of NAND flash and data in an FIFO buffer when an acquisition and storage circuit abruptly powered off is avoided. A ferroelectric memory is used to realize synchronized circulation storage of acquired data and complete preservation of lost data in power-off time, and data in the ferroelectric memory is fused in data recorded by the flash through processing to complement the data lost in the power-off time; and power-on and data storage are continuously carried out after multi-time power-off before the NAND flash memory is full until the NAND flash memory is full. The circuit has the advantages of solving of the complete recording problem of acquired data in the abrupt power-off time, multi-time abrupt power-off restart and continuous storage functions, and convenient expansion on the basis of an original storing circuit, and is worth to be adopted and promoted.
公开/授权文献:
- CN105405465A 数据存储及处理电路 公开/授权日:2016-03-16
IPC结构图谱:
G | 物理 |
--G11 | 信息存储 |
----G11C | 静态存储器 |
------G11C16/00 | 可擦除可编程序只读存储器 |
--------G11C16/02 | .电可编程序的 |
----------G11C16/06 | ..辅助电路,例如,用于写入存储器的 |
------------G11C16/22 | ...防止对存储单元的未授权或意外访问的安全或保护电路 |