The invention discloses an on-chip system bus, comprising a request priority queue, an arbiter group, an address and control signal selector, an internet and an address decoder. A primary device transmits a bus request signal to the address decoder; the address decoder transmits an application signal to the request priority queue according to the bus request signal; the request priority queue latches the application signal and generates a chip selection signal, and transmits the chip selection signal to the internet, and transmits the application signal to the arbiter group at the same time; the arbiter group transmits an arbitration result signal to the internet; the internet selects data and a handshake signal from the primary device to slave device according to the arbitration result signal, and the internet controls the data and the handshake signal from the primary device to slave device according to the chip selection signal. The on-chip system bus of the invention has different transmission time among different primary devices and slave devices on a large-area chip to achieve high-speed, parallel and real-time communication among devices.