
基本信息:
- 专利标题: 小尺寸贴片印迹面积的功率半导体器件及制备方法
- 专利标题(英):Power semiconductor device with small-dimension patch imprinting area, and preparation method
- 申请号:CN201410146382.9 申请日:2014-04-11
- 公开(公告)号:CN104979306A 公开(公告)日:2015-10-14
- 发明人: 高洪涛 , 鲁军 , 鲁明朕 , 叶建新 , 霍炎 , 潘华
- 申请人: 万国半导体(开曼)股份有限公司
- 申请人地址: 英属西印度群岛开曼群岛大开曼岛KY1-1107玛丽街122号和风楼P.O.709邮箱
- 专利权人: 万国半导体(开曼)股份有限公司
- 当前专利权人: 万国半导体(开曼)股份有限公司
- 当前专利权人地址: 英属西印度群岛开曼群岛大开曼岛KY1-1107玛丽街122号和风楼P.O.709邮箱
- 代理机构: 上海申新律师事务所
- 代理人: 吴俊
- 主分类号: H01L23/367
- IPC分类号: H01L23/367 ; H01L21/58
The invention mainly relates to a power semiconductor package, and more specifically relates to a power semiconductor device with a small-dimension patch imprinting area, and a preparation method thereof. The power semiconductor device is provided with pedestals, and first chips and second chips which are respectively adhered to the front surfaces and the back surfaces of the pedestals, one or more interconnection sheets arranged on the front surfaces of the first chips, one or more interconnection sheets arranged on the front surfaces of the second chips, and a plastic-sealed body wrapping the first chips, the second chips, the pedestals and each interconnection sheet, wherein the wrapping mode is that one side-rim surface of each interconnection sheet is at least enabled to be exposed from one side-rim surface of the plastic-sealed body.
公开/授权文献:
- CN104979306B 小尺寸贴片印迹面积的功率半导体器件及制备方法 公开/授权日:2018-06-01
IPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L23/00 | 半导体或其他固态器件的零部件 |
--------H01L23/34 | .冷却装置;加热装置;通风装置或温度补偿装置 |
----------H01L23/36 | ..为便于冷却或加热对材料或造型的选择,例如散热器 |
------------H01L23/367 | ...为便于冷却的器件造型 |