The invention relates to an embedded component packaging structure and a manufacturing method thereof. The embedded component packaging structure comprises a substrate, a first electric interconnector, a first patterned conducting layer, a second patterned conducting layer, at least one bare chip, first dielectric layers, third patterned conducting layers and metal layers, wherein the substrate is provided with a first surface, a second surface opposite to the first surface, and through holes extending from the first surface to the second surface, the first electric interconnector extends to the second surface from the first surface, the first patterned conducting layer is arranged on the first surface, the second patterned conducting layer is arranged on the second surface and is electrically connected with the first patterned conducting layer through the first electric interconnector, the at least one bare chip is arranged in the through holes and is provided with an active surface and a back surface opposite to the active surface, the back surface of each bare chip is exposed from the second surface of the substrate, the first dielectric layers are arranged in the gaps between the bare chips and the lateral walls of the through holes and cover the active surfaces of the bare chips and the first surface of the substrate, the third patterned conducting layers are arranged on the surfaces of the first dielectric layers and electrically connected with the bare chips through second electric interconnectors, and the metal layers are directly arranged on the back sides of the bare chips.