The invention discloses a method for improving a wafer internal stress of a trench gate discrete power device. The method comprises the following steps: step one, forming an oxide layer at a silicon substrate; step two, carrying out photoresist coating on the oxide layer and opening a part of cutting channel region used by a trench gate discrete power device by using ways of photoetching and etching; step three, etching the oxide layer according to a defined oxide layer etching position graph; step four, removing the photoresist and etching the silicon substrate to form a trench; step five, removing the oxide layer and carrying out thermal growth of a substrate oxide layer in the trench and on the end surface of the silicon substrate; step six, carrying out silicon nitride layer deposition on the end surface of the substrate oxide layer; step seven, removing the silicon nitride layer at the bottom of the trench and the end surface of the silicon substrate; step eight, carrying out thermal growth of a field oxide layer on the substrate oxide layer and in the trench; and step nine, carrying out photoetching and etching on the field oxide layer, opening an active region, and manufacturing a trench gate discrete power device. According to the invention, the mutual acting force between the trench gate discrete power devices can be reduced; and the curvature and the internal stress of the silicon wafer can be improved.