
基本信息:
- 专利标题: 具有带有低电流结构的读/写元件的3D阵列的非易失性存储器及其方法
- 专利标题(英):Non-volatile memory having 3d array of read/write elements with low current structures and methods thereof
- 申请号:CN201180060500.9 申请日:2011-12-13
- 公开(公告)号:CN103415887A 公开(公告)日:2013-11-27
- 发明人: G.萨马奇萨 , J.埃尔斯梅尔
- 申请人: 桑迪士克3D有限责任公司
- 申请人地址: 美国加利福尼亚州
- 专利权人: 桑迪士克3D有限责任公司
- 当前专利权人: 桑迪士克科技有限责任公司
- 当前专利权人地址: 美国加利福尼亚州
- 代理机构: 北京市柳沈律师事务所
- 代理人: 黄小临
- 优先权: 61/423,007 2010.12.14 US; 13/323,766 2011.12.12 US
- 国际申请: PCT/US2011/064695 2011.12.13
- 国际公布: WO2012/082770 EN 2012.06.21
- 进入国家日期: 2013-06-14
- 主分类号: G11C13/00
- IPC分类号: G11C13/00
A three-dimensional array read/write (R/W) memory elements is formed across multiple layers of planes positioned at different distances above a semiconductor substrate. It is preferable to operate the R/W elements with low current and high resistive states. The resistance of these resistive states depends also on the dimension of the R/W elements and is predetermined by the process technology. A sheet (400) electrode in series with the R/W element (430) and a method of forming it provide another degree of freedom to adjust the resistance of the R/W memory element (430). The thickness of the sheet electrode (400) is adjusted to obtain a reduced cross-sectional contact in the circuit path from the word line (470) to the bit line (440). This allows the R/W memory element (430) to have a much increased resistance and therefore to operate with much reduced currents. The sheet electrode (400) is formed with little increase in cell size.
公开/授权文献:
- CN103415887B 具有带有低电流结构的读/写元件的3D阵列的非易失性存储器及其方法 公开/授权日:2016-05-04